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Vivado, Vitis, Vitis Embedded Platform, PetaLinux, Device models Summary Vitis HLS used both in Vitis and Vivado C based entry boosts productivity Get started with examples and tutorials Vitis™ Core Development Kit - AMD Vitis™ Unified Software Platform 2025.2 Release Highlights : Enhanced Design Flow with AMD Versal™ AI Engines AI Engine API enhancements for Versal AI Edge and Versal AI. Vitis HLS is tightly integrated with both the Vivado Design Suite for synthesis, place, and route, and the Vitis core development kit for heterogeneous system-level design and application acceleration. Vitis™ Model Composer provides the HDL blockset in Xilinx toolbox that enables the use of the MathWorks model-based Simulink design environment for FPGA design.

In a future release, we plan to update the Vitis AI quantizer to ingest ONNX models, enabling a complete end-to-end workflow to deploy floating-point ONNX models directly on AMD hardware targets. VITIS DEVELOPER SITE to examples, tutorials and documentation, as well as a space to connect the Vitis developer community. It will be managed by Xilinx and Vitis expe Vitis AI Library: the What? Vitis AI Library provides high-level API based libraries across different vision tasks: classification, detection, segmentation and etc.